PCBRouteAgent Brings Hierarchical Planning to Complex PCB Routing
Summary:PCBRouteAgent is a multimodal agent designed to automate printed circuit board routing by separating board-level strategy from geometric execution. Its Global Routing Planner combines PCB images with structured electrical and geometric data to specify connectivity topology, routing order, corridors, and layer transitions. A Detailed Routing Executor then applies these plans through KiCad's native routing engine, performs bounded local recovery, and returns structured feedback for targeted revisi
From Direct Trace Generation to Hierarchical Routing
PCBRouteAgent separates board-level strategy from geometric execution in an LLM-based PCB routing system. Its Global Routing Planner handles connectivity decisions, while a Detailed Routing Executor invokes KiCad's native routing engine and performs bounded local recovery. Rather than asking the model to emit every track coordinate directly, the architecture divides electrical intent, spatial planning, and execution state into separate layers.
The system coordinates three forms of state:
- Electrical connectivity: which nets must be connected and their routing priorities;
- Board-level geometry: usable corridors and where layer transitions are required;
- Execution history: which tracks KiCad has accepted and where conflicts occurred.
The planner combines board images with structured electrical and geometric information, producing connectivity topology, routing order, corridors, and layer-transition guidance. The executor translates these instructions into KiCad operations. When a route cannot be completed, the failure is converted into structured feedback, allowing the next iteration to revise only the affected guidance while preserving accepted tracks.
Why Global Planning Is Harder Than Coordinate Generation
PCB routing is not ordinary two-dimensional path planning. Design rules jointly constrain connectivity, clearance, trace width, vias, layer changes, and manufacturing requirements. Every accepted route also changes the space available to later routes. Direct LLM coordinate generation commonly fails in four ways:
- Producing visually plausible paths that violate clearance, width, or layer rules;
- Solving local geometry without accounting for net ordering and critical channels;
- Failing to identify which connection, corridor, or transition should change after an error;
- Destroying previously valid routes during full-board replanning.
PCBRouteAgent also bounds local recovery. The executor first translates planning guidance into native KiCad operations and only attempts restricted repairs when the router cannot complete a target. Unresolved failures are returned to the planner instead of allowing the execution layer to rewrite the global topology. This resembles a practical engineering workflow: establish network organization and routing order first, then resolve geometric conflicts.
Evaluation: Strong on Most Splits, Uneven on the Hardest
The study evaluates 247 synthetic and real boards from four PCBWorld-Bench splits. The clean-pass rate measures whether the final output satisfies the task without triggering design-rule violations.
| Test split | Clean-pass rate | |---|---:| | D2 | 100% | | D3-A | 94.9% | | D3-B | 100% | | D3-C | 40% |
On the three real-world subsets, PCBRouteAgent improves over the strongest evaluated baseline by 13.9, 36, and 10 percentage points, respectively. The gains suggest that hierarchical planning, structured failure feedback, and preservation of accepted routes are particularly valuable on complex boards.
The 40% result on the hardest split prevents a stronger conclusion. It exposes a long tail of routing problems where local recovery cannot resolve global ordering conflicts. The summary does not provide a failure taxonomy, so it is not yet possible to determine whether the dominant bottleneck lies in visual understanding, planning, the KiCad interface, rule configuration, or compute budget.
Engineering Trade-offs: Reliability, Latency, and Auditability
The most production-relevant feature is not the use of an LLM itself, but the way the agent is constrained to an inspectable workflow. Planning decisions, tool calls, and failure feedback can be recorded in structured form, making it possible to identify which layer introduced an error. Retaining accepted routes also reduces retry cost and limits error propagation during replanning.
The costs are equally important. Multimodal planning requires processing high-resolution board images alongside structured data, adding inference latency relative to a conventional deterministic router. Feedback-driven revision introduces additional model calls and KiCad operations. Evaluation should therefore track more than final pass rate: retries per board, planning and execution latency, token consumption, human-intervention rate, and the share of accepted routes retained after a revision.
Synthetic boards and real boards also differ in visual distribution, component density, and manufacturing constraints. Generalization across factories, KiCad versions, and high-speed boards remains to be independently verified.
Compared with classic autorouters, the LLM's potential advantage lies in jointly interpreting board images, heterogeneous design intent, and tool logs—not in replacing mature constraint solvers. The more realistic deployment pattern is to let the LLM propose candidate topology and routing order, use KiCad and specialized solvers for deterministic geometry, and retain design-rule checking as the final authority.
Deployment Recommendations
A production implementation should use a rollbackable and auditable state machine. Each planning cycle should submit a structured patch, run KiCad execution, and validate the result with a design-rule checker. Only routes that pass validation should become persistent state. Failed regions should retain conflict geometry, via occupancy, and layer information for targeted revision.
At minimum, deployments should track:
- Clean-pass rate and failure causes;
- End-to-end time, model calls, and KiCad operations per board;
- Retention of accepted tracks after planner revisions;
- Design-rule violations on real manufacturing constraints and high-speed boards.
Production use also requires rule-version management, independent geometric validation, and human approval gates. Because PCB files directly affect component placement, signal integrity, and manufacturing output, passing local DRC does not automatically qualify the system to replace senior engineering sign-off.
PCBRouteAgent presents a credible structure for engineering agents: use a model for global planning, a specialist tool for deterministic execution, and structured feedback to connect them. Its advantages on three real-world subsets are notable, but the 40% clean-pass rate on the hardest split shows that reliability, explainability, and coverage of difficult boards remain the central barriers to engineering deployment.
— END —Source: Hugging Face Daily Papers (2026-11-05)
Tags: #PCBRouteAgent #Multimodal Agents #PCB Auto-Routing #KiCad #Hierarchical Planning
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